MAVO: An Automated Framework for ESL Design Monitor, Analyze, Visualize and Optimize

Over the last decade, research in Electronic System Level (ESL) design has resulted in significant advances in addressing the rising design complexity and meeting the required performance constraints. Now a major concern of system-level design is the power reduction and energy dissipation of the system-on-chip which not only affects battery lifetime but also thermal aspects and reliability of the end product. Towards power-aware ESL design, we present MAVO, an automated framework to Monitor, Analyze, Visualize and Optimize both power and performance at the early stages of the design process. Using four techniques for pipeline balancing, Dynamic Voltage and Frequency Scaling (DVFS), power scheduling, and peak-power reduction, we minimize and balance the energy dissipation at the same time as addressing performance constraints. Using an image processing application, we demonstrate the benefits of automated power profiling and visualization in the MAVO framework resulting in a smoothed energy dissipation profile by 29% and with 16% power reduction without performance penalty.